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LSI/CSI
UL
(R)
LS6511
(631) 271-0400 FAX (631) 271-0405
October 2002
LSI Computer Systems, Inc. 1235 Walt Whitman Road, Melville, NY 11747
A3800
PIR SENSOR INTERFACE
FEATURES: * Direct Interface with PIR Sensor * Two-Stage Differential Amplifier * Amplifier Gain and Bandwidth externally controlled * True and Complementary Output Drives * Separate digital filters for processing positive and negative input signals * Single Pulse/Dual Pulse/ Concurrent Pulse Detection * Adjustable Output Pulse Width * Optional 5V Shunt Regulator Output * 50A Typical Supply Current * Undervoltage Detection * LS6511(DIP); LS6511-S (SOIC) - See Figure 1 APPLICATIONS: Security system intrusion detection, automatic doors, motion triggered events such as remote animal photography. DESCRIPTION (See Figure 5) The LS6511 is a CMOS integrated circuit, designed for detecting motion from a PIR Sensor and initiating appropriate responses. DIFFERENTIAL AMPLIFIER Each stage of the two stage Differential Amplifier can be set to have its own amplification and bandwidth. The two inputs to the first stage allow for single-ended or differential connection to PIR Sensors. This stage can be biased anywhere in its dynamic range. The second stage is internally biased so that the Window Comparator's lower and higher thresholds can be fixed relative to this bias. Signal levels as low as 100V can be detected. WINDOW COMPARATOR The Window Comparator provides noise filtering by enabling only those signals equal to or greater than a fixed threshold at the output of the Differential Amplifier to appear at the 2 outputs of the Window Comparator. One output detects positive input signals while the other output detects negative input signals. COMPARATOR DIGITAL FILTER The outputs of the Window Comparator are filtered so that motion must be present for a certain duration before it can be recognized and appear as pulses at the Digital Filter outputs. An external RC network sets the duration time. Nominal duration is 50ms. MODE SELECT A tristate input pin selects how the detected signals are processed. Single Pulse (SP) Mode is when detection from either a positive or negative input signal at the Digital Filter outputs will cause an LED/RELAY output to occur. Concurrent Pulse (CP) Mode is when detection from a positive and negative input signal must occur within a specific time before an output will occur. Dual Pulse (DP) mode is when any two detections within a specific time will cause an output to occur. SP Mode = 0; CP Mode = Open; DP Mode = 1.
6511-102502-1
PIN ASSIGNMENT - TOP VIEW
DIFF. AMP. 1 OUTPUT DIFF. AMP. 2 INPUT (-) DIFF. AMP. 2 OUTPUT DIGITAL FILTER RC CP MODE / DP MODE RC
LSI
1 2 3
14 13 12
DIFF. AMP 1 INPUT (-) DIFF. AMP 1 INPUT (+) 5V REGULATOR OUTPUT V DD (+V ) V SS (- V ) LED/RELAY OUTPUT LED/RELAY OUTPUT
LS6511
4 5
11 10 9 8
DURATION TIMER RC 6 MODE SELECT 7
FIGURE 1
PROGRAMMABLE RETRIGGERABLE ONE-SHOTS Positive and negative input signals at the digital filter outputs will generate retriggerable one-shot pulses. In the Concurrent Pulse Mode, outputs from each one-shot must occur together at some point in time to cause an output to occur. The one-shot pulse width is programmable using an external RC network. Typical pulse widths used vary between 1 and 12 seconds. WINDOW TIMER In the Dual Pulse Mode any two detections must occur within a timing window to cause an output to occur. The timing window is programmable using an external RC network. Typical windows are between 1 and 5 seconds. OUTPUT DURATION TIMER The duration timer is retriggerable and programmable using an external RC network. Typical duration times are between 0.5 and 15 seconds. Successive input detections will restart the timer. OUTPUTS The LED/RELAY Output is an open drain output that will sink current when an input signal is detected and processed and when the Power Supply drops below 3.7V (Typical) (Undervoltage Detection). The Undervoltage Detection will be removed when the Power Supply rises above 3.9V (Typical). The LED/ RELAY Output performs identically but is opposite in polarity. The output can sink current from a relay coil returned to a positive voltage (VDD to 9.5V maximum). SHUNT REGULATOR The LS6511 includes a 5V Shunt Regulator Output which can be tied to the VDD Pin so that the circuit can be powered from a higher voltage power supply. Note: See Figures 2, 3 and 4 for application schematics.
ABSOLUTE MAXIMUM RATINGS: PARAMETER DC supply voltage Any input voltage Operating temperature Storage temperature SYMBOL VDD - VSS VIN TA TSTG VALUE +7 VSS - 0.3 to VDD + 0.3 -40 to +85 -65 to +150 UNIT V V C C
ELECTRICAL CHARACTERISTICS: (All voltages referenced to VSS, TA = -40C to +55C, 4.5V VDD 6.5V, unless otherwise specified.) PARAMETER
SUPPLY CURRENT: VDD = 5V VDD = 4.5V - 6.5V
SYMBOL
IDD IDD
MIN -
TYP 50 65
MAX 75 125
UNIT A A
CONDITIONS
LED/RELAY, LED/RELAY and REGULATOR outputs not loaded
REGULATOR:
Voltage Current DIFFERENTIAL AMPLIFIERS:
Open Loop Gain, Each Stage Common Mode Rejection Ratio Power Supply Rejection Ratio
VR IR
5.00
-
5.75
-
6.25 10
V mA
-
G CMRR PSRR VS
70 60 60 100
-
-
dB dB dB Vp-p
TA = 25C, with Amplifier Bandpass configuration as shown in Figure 3
Input Sensitivity (Minimum Detectable Voltage to first amplifier when both amplifiers are cascaded for a net gain of 8,000) Input Dynamic Range Diff. Amp 2 Internal Reference COMPARATOR: Lower Reference Higher Reference
VIR
0 -
0.3VDD
1.75 -
V V
-
-
VTHL VTHH
-
VIR - 0.8V VIR + 0.8V
-
V V
At VDD = 5.75V At VDD = 5.75V
DIGITAL FILTER: For 50ms Filter Time
RDF CDF ROS COS RWT CWT
-20
2.2 0.01 2.2 0.22 2.2 0.68 2.2 0.68 -
-
M F M F M F M F mA
-
-
ONE SHOT
(1 Second)
WINDOW TIMER
(2.5 Second)
-
DURATION TIMER (5 Seconds) OUTPUT DRIVE CURRENT
(Vo = 0.5V Max.)
RDT CDT
VDD = 5V
IO
The information included herein is believed to be accurate and reliable. However, LSI Computer Systems, Inc. assumes no responsibilities for inaccuracies, nor for any infringements of patent rights of others which may result from its use.
6511-102402-2
FIGURE 2. TYPICAL RELAY APPLICATION
NOTE 1: The relay coil is normally energized and the LED is off. When an alarm occurs, the relay coil becomes de-energized and the LED is turned on.
R3 C3 + C2 R2 PIR SENSOR R9 AMP 2 OUT C9
R1 = See NOTE 2 R2 = 36k R3 = 2.7M R4 = 36k R5 = 2.7M
R6 = 2.2M (Typical) R7 = 2.2M (Typical) R8 = 2.2M (Typical) R9 = 3k R10 = 2.2k (Typical)
1 + C4 R4 2 R5 3 V DD R6 4 V DD C6 R7 5 C7 See Note 3 CP MODE or DP MODE RC DIG FILTER RC V DD AMP 2 (-)IN AMP 1 (+)IN AMP 1 OUT AMP 1 (-)IN
14
13
C5
5V REG OUT
12
RAW DC INPUT R1 + C1 -
C1 = 100F C2 = 33F C3 = 0.01F C4 = 33F C5 = 0.01F C6 = 0.01F (Typical) C7 = 0.22F (CP Mode; Typical) C7 = 0.68F (DPMode; Typical) C8 = 0.22F (Typical) C9 = 0.1F D1 = 1N4001 RELAY = No typical P/N PIR = HEIMANN LHi 958, 968 (Typical) All Resistors 1/4W. All Capacitors 10V.
11
10 V SS RELAY COIL 9 D1
V DD R8
LS6511
6 C8 V DD S 7 MODE LED/REL OUT DUR TIM RC
LED/REL OUT
R10 8 LED
NOTE 2: R1 is selected to provide sufficient current to drive the LS6511 and PIR Sensor. Any surplus current is available to drive additional loads applied to the 5V Shunt Regulator output or is absorbed by the 5V Shunt Regulator. Refer to specifications for current limits. NOTE 3: In SP Mode, R7 and C7 are not used and Pin 5 is tied to Vss.
S = 3-Position SPDT (On-Off-On)
NOISE CONSIDERATIONS Layout of any circuit using a high-gain PIR amplifier is critical. The PIR amplifier components should be located close to the amplifier pins on the chip in order to minimize noise pickup.The oscillator and relay drive components should be located away from the amplifier components.
Other steps that can help reduce noise is adding a ground shield backplane to the PCB and enhancing the filtering of VDD; i.e., adding a 0.1uF high frequency capacitor across C1 and increasing C1 to 220 F.
FIGURE 3. INHIBITING OUTPUTS UPON POWER TURN-ON
Using the typical application circuit as shown in Figure 2, the Outputs on Pins 8 and 9 occur on power-up because of the large settling time in the amplifier stages. In applications where this is not desireable, the digital filter oscillator must be disabled on power-up long enough to enable the PIR amplifiers to stabilize. Replacing the R6-C6 circuit shown in Figure 2 with the circuit shown in Figure 3 will disable the digital filter oscillator until the voltage across the 220F capacitor reaches a value high enough for the oscillator to begin oscillating. Component values that can be changed to speed up stabilization include C2, C3, C4 and C5. C3 and C5 become 0.001F and C2 and C4 become 10F.
V DD 100k + R6 2.2M LS6511 - 4 220F C6 .01F
6511-102402-3
FIGURE 4. DIFFERENTIAL INTERFACE TO PIR SENSOR PAIR
R2 C2
1 + C3 R3 2 R4 3
AMP 1 OUT
AMP 1 (-)IN
14
R5
+
C5 R7 C8
PIR SENSOR 1
AMP 2 (-)IN
C4
AMP 1 (+)IN
13
R6
C6 + R8 C9
PIR SENSOR 2
AMP 2 OUT
R10
LS6511
R9
C7
12
5V REG OUT
V DD
+ C1 -
5V R1
R1 = 1k R6 = 36k C1 = 100F R2 = 2.7M R7 = 36k C2 = 0.01F R3 = 36k R8 = 36k C3 = 33F R4 = 2.7M R9 = 5.6M C4 = 0.01F R5 = 36k R10 = 2.4M C5 = 33F PIRs = HEIMANN LHi 954, 958, 978, 874 or 878 (Typical)
C6 = 33F C7 = 0.01F C8 = 0.1F C9 = 0.1F
All Resistors 1/4 W. All Capacitors 10V. NOTES: 1) A pair of PIR Sensors may be used in applications where a wider optical field of view is needed. 2) External 5V Regulator drives the LS6511 and PIR sensor.
FIGURE 5. LS6511 BLOCK DIAGRAM
DIFF AMP 2 3 OUTPUT DIFF AMP 2 2 INPUT (-) DIFF AMP 1 1 OUTPUT WINDOW COMPARATOR OUTPUT DURATION TIMER DIGITAL FILTER DRIVER DIGITAL FILTER RC DURATION TIMER RC MODE SELECT
4
6
7
+
COMP
9 LED/RELAY
OUTPUT
DIFF AMP 1 14 INPUT (-) DIFF AMP 1 13 INPUT (+)
AMP
AMP
+
VDD
+ +
COMP
DIGITAL FILTER WINDOW TIMER
M U X
-
(+V)
VDD 11 SHUNT REGULATOR VSS 10 PROGRAMMABLE RETRIGGERABLE ONE-SHOT DRIVER
8
(-V)
5 V REGULATOR 12 OUTPUT CONCURRENT PULSE/ DUAL PULSE RC 5 PROGRAMMABLE RETRIGGERABLE ONE-SHOT
LED/RELAY OUTPUT
UNDERVOLTAGE DETECTOR
6511-102402-4

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